AKM 5381 PDF
ASAHI KASEI. [AKD].. / – 7 -. [ADC Plot: fs=48kHz]. AKM. AK THD+N vs. Input Level. VA=VD=V, fs=48kHz, fin=1kHz. AKM Semiconductor AKET. Explore Integrated Circuits (ICs) on Octopart: the fastest AKET. Dual Channel Dual ADC Delta-Sigma 96ksps bit. The AK achieves high accuracy and low cost by using Enhanced dual bit ∆Σ WARNING: AKM assumes no responsibility for the usage beyond the.
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Decoupling capacitors should be as near to the AK as possible, with the small value ceramic capacitor being the nearest. This value is the full scale 0dB of the input voltage.
The digital filter rejects noise above the stop band except for multiples of 64fs. Before considering any use or application, consult the 53811 Kasei Microsystems Co. Grounding and Power Supply Decoupling The AK requires careful attention to power supply and grounding arrangements.
System analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board. AKM sales office or authorized distributor concerning their current status. The AK includes an anti-aliasing filter RC filter to attenuate a noise around 64fs. Input voltage is proportional to VA voltage.
Table 1 shows the relationship of typical sampling frequency and the system clock frequency.
The reference frequency of these responses is 1kHz. No load current may be drawn from these pins.
In slave mode, the internal timing starts clocking by the rising edge falling edge at mode 1 of LRCK after exiting from reset and power down state by MCLK. Lead frame surface treatment: Resolution 24 Bits Input Voltage Note 4 2. A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or akn, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very wkm standards of performance and reliability.
The power up sequence between VA and VD is not critical. An evaluation board is available which demonstrates application circuits, the optimum layout, power supply arrangements and measurement results. The audio interface supports both master and slave modes. The AK samples the analog inputs at 64fs.
All signals, especially clocks, should be kept away from the VCOM pin in order to avoid unwanted coupling into the AK If these clocks are not provided, the AK may draw excess current due to its use of internal dynamically refreshed logic. The calculated delay time induced by digital filtering.
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An electrolytic capacitor 2. All digital input pins should not be left floating. Alternatively if Ak, and VD are supplied separately, the power up sequence is not critical.
The ADC outputs settle in the data corresponding to the input signals after the end of initialization Settling approximately takes the group delay time. AKM assumes no responsibility for the usage beyond the conditions in this datasheet. An analog initialization cycle starts after exiting the power-down mode.
A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property.
All voltages with respect to ground. Voltage Reference The voltage input to VA sets the analog input range. Normal operation is not guaranteed at these extremes.
Operation at or beyond these limits may result in permanent damage to the device. The cut-off frequency of the HPF is 1.
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VA and VD are usually supplied from the analog supply in the system. In master mode, the internal timing starts when MCLK is input. The passband and stopband frequencies scale with fs.